发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To shorten processing time for a store instruction by sending out store data without allowing it to pass through an operation register simultaneously with a condition code in accordance with plural store instructions. CONSTITUTION:When a store instruction follows an operation instruction, the result of operation and a first condition code are stored in an operation result register 5 and a first condition code register 6, respectively. The result of operation is stored in a data register 9 by a bypass line 12, and in a third condition code generating part 8, a third condition code is generated in accordance with plural kinds of store instructions. Plural kinds of generated third condition codes are selected by a selector circuit 10 in accordance with the kind of the store instruction, and stored in a condition code register 11. In such a manner, the result of operation and the condition code are outputted simultaneously without passing through an operation register, and the processing time of the store instruction can be shortened.
申请公布号 JPH02100134(A) 申请公布日期 1990.04.12
申请号 JP19880253533 申请日期 1988.10.06
申请人 NEC CORP;KOUFU NIPPON DENKI KK 发明人 MAKITA AKIHISA;SAKURAI HIROSHI
分类号 G06F7/00;G06F9/305 主分类号 G06F7/00
代理机构 代理人
主权项
地址