| 摘要 |
PROBLEM TO BE SOLVED: To obtain a cache controller improved in system performance by eliminating the reduction of a cache accessible time due to a cache invalidating process by performing control so that the cache invalidating process is performed for the 1st time at the time of switching from (n)th algorithm to 1st algorithm. SOLUTION: A mapping algorithm controller 310 when judging that a hit rate 301 is less than an expected value informs a main controller 100 of a mapping switching indication 311 and switches a mapping controller A210 to other mapping controllers B220 to D240 with a selector control signal 312. In this switching, the process is carried out without invalidating the cache and when the switching to the starting mapping controller A210 is done again, the cache is invalidated for the 1st time. Consequently, the main controller 100 can continue access to the cache memory without being aware of the switching to other mapping algorithm.
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