发明名称 Circuits, systems and methods for processing data in a one-bit format
摘要 Digital-to-analog conversion circuitry 100 is shown including a path for processing data in a 1-bit format. First portion of an analog finite impulse response filter 300 includes pre-selected number of delay elements 301 for receiving stream of data in the 1-bit format and outputting a plurality of signals in response. A switched capacitor digital-to-analog converter 106 forms a second portion of the finite impulse response filter 301 and has a plurality of elements each receiving one of the plurality of signals as selected to effectuate a set of filter coefficients, converter 106 summing the plurality of signals and outputting an analog data stream.
申请公布号 AU2366100(A) 申请公布日期 2000.07.24
申请号 AU20000023661 申请日期 1999.12.29
申请人 CIRRUS LOGIC, INC. 发明人 XUE-MEI GONG;MARK ALEXANDER;JOHN JAMES PAULOS;ERIC GAALASS;DYLAN HESTER
分类号 H03M1/66;H03H19/00;H03M1/06;H03M3/02;H03M3/04 主分类号 H03M1/66
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