发明名称 ARITHMETIC PROCESSOR
摘要 PURPOSE:To provide an arithmetic processor which executes automatically shift operation in accordance with the property of output data, and does not cause overflow, and in addition, is for obtaining the optimum arithmetically processed result of a few errors. CONSTITUTION:This arithmetic processor is constituted so that arithmetic processing (addition or subtraction) is executed by an ALU 18 by controlling shifters 16, 17, 19 on the basis of the number of the shift operation determined by a shift operation number determining part 15 from output obtained by detecting how many bits two input data can be left-shifted by maximum possible shift number detectors 11, 12 and the values of coefficient registers 13, 14 in which the number of bits of the shift operation for two input data is set beforehand.
申请公布号 JPH06131157(A) 申请公布日期 1994.05.13
申请号 JP19920278402 申请日期 1992.10.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SUZUKI HIDEKAZU;KUBOTA TADASHI;NAKAI SEIJI
分类号 G06F7/38;G06F17/10 主分类号 G06F7/38
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