| 摘要 |
PURPOSE:To make possible data access in free format and efficient access processing by providing a means which sets RAM access timing by a microprogram. CONSTITUTION:Arithmetic processing wherein a K-RAM is accessed is incorporated as the microprogram in a controller chip and a user is enabled to set the timing of access with a register. Then a DCK(dot clock) is newly usable as a control signal. In this case, cycles of about 341 DCKs are included in a 1H (one horizontal scanning) blank (1HSYNC) period, DCK(dot clock) cycles are about one 341th HSYNC cycles, and the access timing is specified in each dot clock cycle. Then the microprogram is loaded in the control chip through a microprogram load address register. |
