发明名称 |
DIGITAL-TO-ANALOG CONVERTER |
摘要 |
PURPOSE:To set a coupling capacitor to a unit capacitance value, by cascade- connecting the 1st and 2nd same capacitor trains weighted in binary with the smallest capacitor in the capacitor trains. CONSTITUTION:A digital input of high-order digit is applied to an input terminal 1 of the 1st capacitor train M-DAC weighted in binary, and the digital input of low-order digit is given to the input terminal 1 of the 2nd capacitor train L- DAC. The M-DAC and L-DAC are coupled via a coupling capacitor 5 and a buffer amplifier 6 is connected to the M-DAC to pick up an output. The digital input controls a switch 3 and obtains an analog value corresponding to the digital input. The capacitance value of the coupling capacitor 5 is minimum among the capacitor trains M-DAC and L-DAC. |
申请公布号 |
JPS57124933(A) |
申请公布日期 |
1982.08.04 |
申请号 |
JP19810010452 |
申请日期 |
1981.01.27 |
申请人 |
NIPPON DENSHIN DENWA KOSHA |
发明人 |
AKAZAWA YUKIO;MATSUTANI YASUYUKI;IWATA ATSUSHI |
分类号 |
H03M1/74;H03M1/80;(IPC1-7):03K13/05 |
主分类号 |
H03M1/74 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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