发明名称 |
MONITOR CIRCUIT FOR INTERNAL PART OF DEVICE |
摘要 |
PURPOSE:To precisely monitor the connection state of circuit units by inserting a pseudo random signal into the pay road of a free cell and adding a parity bit so as to transmit it to a second circuit unit at a first circuit unit. CONSTITUTION:In the first circuit unit, an inspection pattern insertion circuit 1 inserts the pseudo random signal into the pay road of the free cell. A parity addition circuit 3 adds the parity bit to the signal and transmits it to the second circuit unit. In the second circuit unit, a parity inspection circuit 11 inspects the parity of the signal obtained by adding the parity to the pseudo signal.
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申请公布号 |
JPH0750675(A) |
申请公布日期 |
1995.02.21 |
申请号 |
JP19930196551 |
申请日期 |
1993.08.09 |
申请人 |
FUJITSU LTD |
发明人 |
ISHIHARA TOMOHIRO;KONDO RYUICHI;SUDO TOSHIYUKI;OKUDA MASAHITO;YAMASHITA HARUO |
分类号 |
H04L1/00;H04L12/24;H04L12/26;H04L12/28;(IPC1-7):H04L12/28 |
主分类号 |
H04L1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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