OUTPUT BUFFER CURRENT SLEW RATE CONTROLLING INTEGRATED CIRCUIT

摘要

PURPOSE: To obtain an output buffer current slew rate control integrated circuit receiving no influence from conventional kinds of restrictions. CONSTITUTION: The output buffer current slew rate control integrated circuit provided with a first MOS type transistor means 1 supplying a current IOUT for load impedance ZL is provided with current generating means BIAS1, BIAS2 and C1 to C4 generating constant currents ID1 and IC1 and operates these constant currents in switching the input signal IN of the output buffer 1 between two logical states. Thereby, first transistor means P1 and N1 are driven by driving voltages V2 and V3 with a slew rate decided by the constant currents ID1 and IC1 by driving the control input terminals 2 and 3 of the first transistor means P1 and N1.