发明名称 |
Distorted input signal processing circuit has filter whose filter coefficients are influenced by comparison signal produced by equalized signal from filter and output signal of threshold decider |
摘要 |
A distorted input signal (S1) is supplied to a filter (10) which produces an equalized signal (S2) which is supplied to a threshold decider (31). The equalized signal and the output signal (S3) of the threshold decider produce a comparison signal (D) that influences the filter coefficients (FK1) of the filter.
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申请公布号 |
DE10013790(A1) |
申请公布日期 |
2001.11.22 |
申请号 |
DE20001013790 |
申请日期 |
2000.03.20 |
申请人 |
ALCATEL SEL AG |
发明人 |
WEDDING, BERTHOLD |
分类号 |
H04L25/03;(IPC1-7):H04L1/20;H04B1/62;H04B10/08;H04B10/18;H04L12/26 |
主分类号 |
H04L25/03 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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