发明名称 METALLIZATION METHOD OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A metallization method of a semiconductor device is provided to prevent damage of a lower conductive layer when forming a via hole and a trench using dual damascene by using a protection layer made of SOD(Spin On Dielectric). CONSTITUTION: A first etch stopper(410) is formed on a lower conductive layer(300) formed on a semiconductor substrate(100). A first interlayer dielectric(510) and a second etch stopper(450) are sequentially formed on the first etch stopper. A second interlayer dielectric(550) is formed on the second etch stopper. A via hole(710) is formed to expose the lower conductive layer(300) by sequentially etching the second interlayer dielectric(550), the second etch stopper(450) and the first interlayer dielectric(510) using the first etch stopper(410). A protection layer is formed at the bottom of the via hole(710) so as to protect the first etch stopper(410). A trench(750) connected to the via hole is formed by selectively etching the second interlayer dielectric(550) using the second etch stopper(450). After removing the protection layer, the exposed first etch stopper(410) is then removed. Then, an upper conductive layer(900) is formed to fill in the via hole and the trench. At the time, an SOD film, such as HSQ(Hydro SilisesQuioxane) is used as the protection layer.
申请公布号 KR20020085722(A) 申请公布日期 2002.11.16
申请号 KR20010025573 申请日期 2001.05.10
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JAE HAK;LEE, GYEONG U;LEE, SU GEUN;SHIN, HONG JAE
分类号 H01L21/306;H01L21/311;H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/306
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