| 摘要 |
PROBLEM TO BE SOLVED: To accurately measure timing conditions such as a setup/holding time and an access time of an internal synchronous memory. SOLUTION: This semiconductor circuit device is provided with a replica circuit 50 having transfer characteristics similar to those of a bus drive circuit (DRW0-DRW7) for transferring data to a built-in memory. One of output data of the replica circuit and a memory clock signal (CLK) for determining the data/signal fetching timing of the built-in memory is selected by a selector 55. Selector outputs are sampled by flip-flop 60 according to a correction test clock signal (TCLKcal). In the outside, a phase difference between these data and the memory clock signal is measured. COPYRIGHT: (C)2009,JPO&INPIT
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