Construction of MOS integrated circuit for use at low temperature - has depletion transistors with gate-electrode which has low work function and enhancement devices using high work function material

摘要

The integrated circuits consist of NMOS devices on a p-type substrate. The feature is that the depletion transistors have been made by selecting an electrode material which has a lower workfunction than the substrate material, and that no change has been made in the doping level of the substrate in the gate region. Also claimed is the PMOS depletion transistor made on n-type substrate material using a gate electrode of a material with a higher workfunction than the substrate. An inverter structure on p- or n-type Si substrate, consisting of a depletion- and an enhancement device is claimed in which the gate electrode of the depletion transistor length of the transistors is pref. less than 0.5 micron, the supply voltage is pref. less than 5V. Pref. gate electrode materials for depletion transistors on p-type substrate are: carbides, esp. ZrC nitrides, esp. TiN, ZrN, TaN or LaB6. USE/ADVANTAGE - The feature allows the IC's to be used at low temps. e.g. at liquid N2 or liquid He temps. without the depletion transistors falling due to freezing out of implanted opposite type impurities in the substrate surface under the gate region.