VERFAHREN ZUR SYNCHRONISIERUNG VON RECHTECKSIGNALEN.

摘要

The sequence of rectangular signals is clocked by at least one periodic auxiliary signal that acts on flip-flops (FFO-n) equal in number to the rectangular signals. The release of a change in signal state at the output of one of the flip-flops depends on the signal states at the outputs of the adjacent flip-flops and on the clocking of the auxiliary signal. At least one clock generator is provided for the clock inputs of the flip-flops. Devices are connected to one of the inputs of the flip-flops and are driven by a combining network whose inputs are formed by the outputs of the flip-flop stages.