发明名称 Frequency synthesizer having phase control loop with plural branches
摘要 The invention relates to a circuit arrangement for frequency synthesis with a phase control circuit (1) which comprises a first phase discriminator (3) for receiving a reference signal and an output signal supplied by a first frequency divider (6) with a division ratio k, a low-pass filter (4) coupled to the output of the first phase discriminator (3), and an oscillator (5) coupled to the output of the low-pass filter (4) for generating an output signal which can be supplied to the first frequency divider (6). At least one further branch (2) with a further phase discriminator (8) and a further frequency divider (9) which is to be released and which has a division ratio k is present. The further phase discriminator (8) coupled to the input of the low-pass filter (4) is designed for receiving the reference signal delayed by a delay element (10) and the output signal of the further frequency divider (9) provided for receiving the output signal of the oscillator (5). Each delay element (10) has a different delay time corresponding to a fraction of a period T=1/(n*fref) of the reference signal, n being the number of branches (1,2) and fref being the frequency of the reference signal. A control unit (11) releases the frequency divider (9) approximately after the delay time of the delay element (10) assigned to the relevant frequency divider (9).
申请公布号 US5254959(A) 申请公布日期 1993.10.19
申请号 US19920904794 申请日期 1992.06.26
申请人 U.S. PHILIPS CORPORATION 发明人 WUENSCH, CHRISTIAN
分类号 H03L7/22;H03L7/087;H03L7/191;(IPC1-7):H03L7/087 主分类号 H03L7/22
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