发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device including a memory cell array which is formed of each of memory cells connected to intersection of a plurality of bit lines and word lines is provided such that, during designing the layout, a length of a storage electrode of the outermost memory cell in the memory cell array is longer than that of a storage electrode of an inner memory cell, or a spacing between two bit lines in the periphery of the memory cell array is longer than that between bit lines in the inner portion of the memory cell array, or a width of an active region of the outermost memory cell is wider than that of an active region of the inner memory cell, thereby forming a metal layer having an excellent step coverage by means of only the layout arrangement without additional processes while being not concerned about the structure of a storage electrode.
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申请公布号 |
US5392232(A) |
申请公布日期 |
1995.02.21 |
申请号 |
US19930103267 |
申请日期 |
1993.08.09 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, KYEONG T.;AHN, JI H. |
分类号 |
H01L21/28;H01L21/8242;H01L27/10;H01L27/105;H01L27/108;(IPC1-7):G11C11/24 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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