发明名称 Method of manufacturing transistor with channel implant
摘要 A semiconductor device includes a substrate having a first conduction type. A gate insulating film is provided on the substrate. A gate electrode is formed on the gate insulating film. A source region provided on the substrate has a second conduction type different from the first conduction type. A drain region provided on the substrate has the second conduction type. The source region and the drain region extend below the gate insulating film, and are located at respective sides of the gate electrode. A first region provided on the substrate has the first conduction type and extends below the gate insulating film. A second region provided on the substrate has the second conduction type, and extends below the first region. The second region connects with the first region via a pn junction. Third regions provided on the substrate have the first conduction type, and connect with the second region via respective pn junctions. A first one of the third regions extends between the second region and the source region. A second one of the third regions extends between the second region and the drain region. The first region has a width which is smaller than a sum of a width of a depletion layer caused by the pn junction with the second region and a width of a depletion layer caused by application of a voltage to the gate electrode. Third regions have a width which is greater than a sum of a width of a depletion layer caused by the source region and a width of a depletion layer caused by the pn junctions with the second region.
申请公布号 US5580799(A) 申请公布日期 1996.12.03
申请号 US19950477609 申请日期 1995.06.07
申请人 VICTOR COMPANY OF JAPAN, LTD. 发明人 FUNAKI, MASAKI
分类号 H01L29/10;(IPC1-7):H01L21/823 主分类号 H01L29/10
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