发明名称 DIFFERENTIAL FLASH MEMORY CELL AND METHOD
摘要 <p>A flash memory cell. The flash memory cell includes first and second transistors. The first transistor has a control gate coupled to a word line, a drain coupled to a data line and a floating gate. The second transistor, similarly, includes a control gate coupled to the word line, a drain coupled to a second data line and a second floating gate. The first floating gate stores a state of the second transistor prior to programming of the flash memory cell. Further, the second floating gate stores a programmed state of the second transistor. A difference between the states of the first and second transistors represents the value of the data stored in the flash memory cell.</p>
申请公布号 WO1998033186(A1) 申请公布日期 1998.07.30
申请号 US1998000765 申请日期 1998.01.15
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