发明名称 Schaltungsanordnung zur analogen Echounterdrückung
摘要 The invention relates to a circuit arrangement for the suppression of analogue echoes, in particular for application in a hybrid circuit for DSL transmission systems, comprising a replicator (8) for emulating the behaviour of the transmission line (17). The invention further relates to a circuit (3, 4) for emulating the behaviour of the transmitter (13), which comprises at least one low-pass (3, 4). Furthermore a replicator (9, 10) for emulating the behaviour of bridge taps (14) can be provided and, additionally, a replicator (19), for emulating the behaviour of the line driver (1) can also be provided.
申请公布号 DE10030123(A1) 申请公布日期 2002.01.03
申请号 DE20001030123 申请日期 2000.06.20
申请人 INFINEON TECHNOLOGIES AG 发明人 BLON, THOMAS;GROEPL, MARTIN;EICHLER, THOMAS;LAASER, PETER
分类号 H03H7/12;H04B3/20;H04B3/23;H04M1/58;(IPC1-7):H04M1/58 主分类号 H03H7/12
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