发明名称 Low stress semiconductor devices with thermal oxide isolation
摘要 A width of a circuit device isolation region and a width of a device region formed on a semiconductor substrate are determined in such a manner as to satisfy a condition which prevents the occurrence of dislocation due to thermal oxidation for forming the isolation region. A semiconductor device can be fabrication which includes a semiconductor substrate, a plurality of circuit regions formed on a device formation region in the semiconductor substrate and having a width of 0.1 to 125 mum and device isolation regions so formed on the semiconductor substrate as to isolate a plurality of circuit regions from one another and having a width of 0.05 to 2.5 mum, and wherein a ratio of the width of the device isolation region to the width of a plurality of circuit regions adjacent to the device isolation region is from 2 to 50. A method of designing a semiconductor device includes a step of measuring a thickness of a pad oxide film formed on the surface of a semiconductor substrate and a thickness of a nitride film formed on the pad oxide film, a step of measuring internal stress of the nitride film, a step of measuring the width of device formation regions formed on the semiconductor substrate and the width of device isolation regions adjacent to the device formation regions, a step of measuring the depth of a groove formed in the semiconductor substrate by etching a portion of the nitride film on the pad oxide film and existing on the device isolation region, a step of obtaining an internal stress, which is estimated to occur in the proximity of the groove due to thermal oxidation, by conducting stress analysis by using the thickness, the width, the depth and the internal stress, a step of preparing a stress distribution chart representing a region, in which the stress exceeds a dislocation occurrence limit stress at which dislocation occurs due to thermal oxidation, by using the width of the device formation region and the width of the device isolation region as parameters, and a step of setting the values of the width of the device formation region and the width of the device isolation region, which does not generate the occurrence of dislocation, by using the stress distribution chart. The device isolation region is a groove formed in the semiconductor substrate by etching a portion, among the pad oxide film formed on the surface of the semiconductor substrate and a nitride film formed on the pad oxide film, existing on the device isolation region, and having a depth of from 0 to 10 nm when measured from the position of the pad oxide film on the semiconductor substrate.
申请公布号 US2002093060(A1) 申请公布日期 2002.07.18
申请号 US20010893980 申请日期 2001.06.29
申请人 MIURA HIDEO;OGASAWARA MAKOTO;MASUDA HIROO;MURATA JUN;OKAMOTO NORIAKI;TANIZAKI YASUNOBU;WAKIMOTO EIJI;SAKATA SHINJI 发明人 MIURA HIDEO;OGASAWARA MAKOTO;MASUDA HIROO;MURATA JUN;OKAMOTO NORIAKI;TANIZAKI YASUNOBU;WAKIMOTO EIJI;SAKATA SHINJI
分类号 H01L21/762;H01L27/08;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L21/762
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