发明名称 Data processing circuit
摘要 In a data processing circuit which sequentially performs a plurality of data processings, data processors assign, to data, processing destination identifiers indicating subsequent processing destinations determined based on information included in the data, and a switch provides the data to the subsequent processing destinations based on the processing destination identifiers. Alternatively, a processing destination identifier assigning portion provides, to the switch, data in which the processing destination identifiers indicating all data processing procedures determined based on the information included in the data are assigned to data, and the switch provides the data to the subsequent processing destination based on the processing destination identifiers, so that the data processors return the data to the switch after performing predetermined processing to the data received from the switch.
申请公布号 US2004186914(A1) 申请公布日期 2004.09.23
申请号 US20040766358 申请日期 2004.01.27
申请人 SHIMADA TORU 发明人 SHIMADA TORU
分类号 G06F15/173;G06F15/80;H04L12/56;(IPC1-7):G06F15/173 主分类号 G06F15/173
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