发明名称 GAME MACHINE
摘要 PROBLEM TO BE SOLVED: To prevent fraudulent control of input/output in a peripheral device constituting a game machine by permitting the control of the input/output corresponding to address data only when regular address data of full bits are used. SOLUTION: An address decoder includes input terminals for inputting address data of a prescribed number of bits and output terminals in the number smaller than the total number obtained by decoding the whole bit patterns of the address data of the prescribed number of bits. The address decoder also includes two systems of signal output determination circuits (gates 3510c and 3510d) for decoding address data A0-A2 necessary for addressing the output terminals outputting chip selection signals; and a gate circuit 3510e for enabling the decoding operation only if the address data A3-A7 are within a specific address range when strobe signals G2A and G2B for selecting the output of enable signals G1 from two circuits are input. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009000132(A) 申请公布日期 2009.01.08
申请号 JP20070160822 申请日期 2007.06.19
申请人 DAITO GIKEN:KK 发明人 SUDO SHINGO
分类号 A63F7/02 主分类号 A63F7/02
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