发明名称
摘要 <p>PURPOSE:To read accurately the storage data of a multi-value memory even in case the resistance of a ground line is not negligible, by producing the reference voltage of an accurate level after compensating a voltage drop. CONSTITUTION:When a memory cell MC is selected by a column address CA and a row address RA, a current flows in a route of a power supply V, a bit line BL, a cell MC and a ground line 10. Then the output of a load circuit 32 is compared with a reference voltages S1-S3 by sense amplifiers 34-38. A cell group 44 for generation of reference voltage consists of the same transistor Q as a memory cell group. A current flows from the power supply V through the transistor Q selected by a column decoder 46 and the line 10, and a load circuit 50 produces an output S1. The voltage drop produced at the position of the selected transistor is equal to the variation of the read output voltage produced at the position of a cell of a memory cell group. Then the output S1 is set at the reference voltage to correct the difference of voltage drop due to positions. This ensures the reading with no error.</p>
申请公布号 JPS6141078(B2) 申请公布日期 1986.09.12
申请号 JP19830170794 申请日期 1983.09.16
申请人 FUJITSU LTD 发明人 SUZUKI YASUO;HIRAO HIROSHI;SUZUKI YASUAKI
分类号 G11C16/04;G11C11/56;G11C29/00;H01L27/10 主分类号 G11C16/04
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