发明名称 |
Edge sensitive single clock latch apparatus with a skew compensated scan function |
摘要 |
A latch circuit possesses a scan capability, has a single clock input line, and possesses a locking feature whereby input data, once locked in the latch, is insensitive to further changes in state of the input data. The latch also possesses a novel selection apparatus which functions to select either a scan data input line or a system data input line in accordance with the binary state of a system gate input line, the selection apparatus developing an output signal, the binary state of which is locked in the latch in response to a predetermined state of a clock pulse conducted via the single clock line. Clock skew compensation is provided via the locking feature. During a scan mode, clock skew compensation is provided when the clock pulse is received for a period of time after termination of reception of a scan pulse conducted via the system gate input line.
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申请公布号 |
US4692633(A) |
申请公布日期 |
1987.09.08 |
申请号 |
US19840627268 |
申请日期 |
1984.07.02 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
NGAI, CHUCK H.;WATKINS, GERALD J. |
分类号 |
G11C19/00;G01R31/317;G01R31/3185;H03K3/037;(IPC1-7):H03K19/00;H03K5/13;H03K19/02 |
主分类号 |
G11C19/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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