发明名称 DATA PROCESSOR
摘要 PURPOSE:To improve the testing efficiency of a functional block by providing an inner bus with a buffer circuit that enables address data used for selecting the prescribed area in the functional block to be supplied from the outside. CONSTITUTION:When functional blocks such as a program memory ROM, a data memory RAM and a timer TM, all of which are built in a single chip microcomputer MCU, are tested, the buffer circuit BUF provided in the internal bus IB is connected to a tester (not shown in figure). When a test mode is specified, the BUF makes address and control signals outputted from the tester in a state where they can be inputted to the address and control buses of the IB, and data in the data bus of the IB in a state where said data can be outputted to the tester. In those states the tester can directly access the functional blocks as if they were peripheral devices, selects the prescribed area in the functional blocks at addresses supplied from the tester and tests the blocks.
申请公布号 JPS62249264(A) 申请公布日期 1987.10.30
申请号 JP19860092031 申请日期 1986.04.23
申请人 HITACHI LTD 发明人 AKAO YASUSHI;HOTTA SHINKICHI;KEIDA HARUO
分类号 G06F11/22;G06F11/267;G06F15/78 主分类号 G06F11/22
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