发明名称 BINARIZATION CIRCUIT
摘要 PURPOSE:To obtain an accurate binarization signal corresponding to a bar code pattern by providing the titled circuit with a comparator for comparing the output signal of a level selecting circuit with the 1st signal outputted from a delay signal sending circuit to execute comparing processing. CONSTITUTION:An analog signal 1' inputted to terminal 1 is inputted to the delay signal sending circuit 3 and the circuit 3 outputs the 1st delay signal 2' delayed from the signal 1' by a time T and the 2nd delay signal 3' delayed by another time T. A level selecting circuit 7 divides a synthesized signal 7' by the resistance ratio of a resistor R3 to a resistor R4, compares the dividied signal 8' with a mean value signal 9', selects the signal having a higher level, and outputs a binarization decision signal 10'. The signal 10' is inputted to a comparator 8 and the circuit 8 compares the signal 2' with the signal 10' and outputs a binarization signal 11'. Even if the level of a bar signal and the level of a space signal are changed, a signal is sliced by an intermediate level between the space signal and the bar signal and an accurate binarization signal corresponding to the bar code pattern can be obtained.
申请公布号 JPS62249530(A) 申请公布日期 1987.10.30
申请号 JP19860092293 申请日期 1986.04.23
申请人 TOHOKU RICOH CO LTD 发明人 IROKAWA SHIGENOBU
分类号 H03M5/04 主分类号 H03M5/04
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