| 摘要 |
PURPOSE: A column redundancy circuit is provided to reduce a column enable time by comparing addresses during a clock and then outputting the compared result during another clock. CONSTITUTION: A column redundancy circuit includes the first and second address comparators(10,30), a fault address storing portion(20), comparison result output portion(40) and a decoder(50). The first address comparator compares an external address with a reference address in response to an internal clock signal if the external address has a fault. The second address comparator compares the external address increased one by one with the reference address in response to the an internal clock signal delayed for a predetermined time if the external address has a fault. The fault address storing portion stores an address of a failed memory cell. The comparison result output portion outputs the comparison result of the first and second address comparison portions. The decoder activates a designated column or redundancy column in response to an output signal of the comparison result output portion.
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