发明名称 METHOD AND CIRCUIT FOR RECOVERING BIT CLOCK SIGNAL
摘要 PROBLEM TO BE SOLVED: To provide a method and a circuit for recovering a bit clock that dispenses with a band-pass filter for extracting a subcarrier. SOLUTION: An analog/digital converter 1 samples a frequency division multiplex PSK modulation wave received by using a sampling signal with a frequency which is a multiple of 128 (=2n (n is a natural number)) of a frequency interval of a subcarrier to apply analog/digital conversion to the PSK modulation wave, an FFT circuit 2 applies FFT arithmetic operation to each sample of the analog/digital conversion output consisting of 128 sets as the number of data to extract the subcarrier, power arithmetic units 31, 32, 33,..., 3n calculate the power, on the basis of I and Q signal components in pairs in an FFT arithmetic operation output, the power arithmetic output is fed to band-pass filters 41, 42, 43,..., 4n extracting the bit clock signal that extract the bit clock signal, and an adder 5 sums and averages the extracted bit clock signals and transmits its output as a recovered bit clock signal.
申请公布号 JP2002016569(A) 申请公布日期 2002.01.18
申请号 JP20000197095 申请日期 2000.06.29
申请人 JAPAN RADIO CO LTD 发明人 FURUYA YASUO;DOMON HIDEYUKI
分类号 H04L27/22;H04J1/00;H04J11/00;H04L7/027 主分类号 H04L27/22
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