发明名称 AUTOMATIC INITIALIZATION TYPE FREQUENCY DIVIDER
摘要 PROBLEM TO BE SOLVED: To provide an automatic initialization type frequency divider for a high-frequency clock. SOLUTION: A frequency divider is a closed loop system having a re-circulation storage element 100, at least one feedback storage element 102, and an end storage element 104 connected in series. Each storage element 100, 102, and 104 receives a common clock 106. The logical sum of the end storage element output 112 and at least one of other storage element outputs 114 is supplied to the input 112. Consequently the automatic initialization state machine is formed. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006229957(A) 申请公布日期 2006.08.31
申请号 JP20060032705 申请日期 2006.02.09
申请人 AGILENT TECHNOL INC 发明人 ROBAATO EICHI MIRAA JIYUNIA
分类号 H03K23/00;H03K23/64 主分类号 H03K23/00
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