Clock recovery circuit

摘要

Clock data recovery can be accomplished using a phase change determination circuit that generates, based upon detected phase differences between a capture clock signal and data signal, a delta signal and a delta selection signal. A calculation circuit generates a set of phase interpolation (PI) codes from prior and speculative values of the delta signal. A selection circuit selects, in response to the delta selection signal, between the sets of PI codes, which are provided as an output of the clock data recovery device.

主权项

1. A clock data recovery device comprising:
a phase change determination circuit configured to:
detect a phase difference between a data signal and a clock signal; andgenerate, based upon the detected phase difference, a delta signal and a delta selection signal; and a speculative calculation circuit that includes:
a first calculation circuit configured to generate a first set of phase interpolation (PI) codes from a first prior value of the delta signal;a second calculation circuit configured to generate a second set of PI codes from a second prior value of the delta signal;a third calculation circuit configured to generate a third set of PI codes from a speculative value of the delta signal that is based upon the first prior value and the second prior value of the delta signal; anda selection circuit configured to select, in response to the delta selection signal, between the first, second, and third sets of PI codes to provide the selection as an output of the clock data recovery device.