System and method of encoding in a serializer/deserializer

摘要

In one form a method of encoding a data word for serial transmission is provided, where a data word comprising a plurality of data bits is received, an invert bit having a bit value is appended to the data word, the data bits and invert bit are scrambled, ECC check bits are generated, and the data bits, invert bit, and ECC check bits are shuffled together to form an encoded word to be transmitted from a transmitter. A receiver may decode by implementing a decode process with error correction. The encoded word may also be DC balanced by checking the disparity of the bits to be encoded against a running disparity to invert or not the bits. An integrated circuit serializer/deserializer comprises hardware to perform encoding and/or decoding. A hardware functional verification system may implement the disclosed encoding/decoding for interconnections between emulation chips.

主权项

1. A method of encoding data in a serializer/deserializer device of an integrated circuit, comprising:
receiving a data word comprising a plurality of data bits at the serializer/deserializer device; appending an invert bit to the plurality of data bits, wherein the invert bit has a bit value; scrambling the plurality of data bits and the invert bit; generating a plurality of error correction code (ECC) check bits from the plurality of data bits and the invert bit based on a contents of an ECC table; shuffling the plurality of data bits, the invert bit, and the plurality of ECC check bits to form an encoded word; and serially transmitting the encoded word from a transmitter of the integrated circuit.