发明名称 FLOATING-POINT DIVIDING CIRCUIT
摘要 <p>A floating-point dividing circuit for dividing floating-point data by a nonrecovery dividing method. The circuit has a circuit part (83) which pre-processes a dividend (N) and a divisor (D) before dividing and determines a division type, an exponent operating part (91), a mantissa dividing part (100), a quotient generating circuit part (93, 94, 101, 103-105), and at least one of an exception and non-operation detecting part (92) and a control part (90). The exception and non-operation detecting part (92) generates a stop signal (DSTOP#X) upon detecting a non-operation pattern, and stops the repeated operation of the mantissa dividing part (100). The control part (90) generates at least one of a non-execution signal (DRUN) and a control signal (DCNT0-15#X), and stops latch operations of registers, during the non-execution of a division instruction. <IMAGE></p>
申请公布号 KR950006584(B1) 申请公布日期 1995.06.19
申请号 KR19920072842 申请日期 1992.11.13
申请人 FUJITSU LTD. 发明人 KUROIWA, KOICHI
分类号 G06F7/537;G06F7/483;G06F7/499;G06F7/52;G06F7/535;(IPC1-7):G06F7/52 主分类号 G06F7/537
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