发明名称 Multiple stage presettable reversible counter - has several flip-flops in each counting stage, interconnected by gates
摘要 <p>A backwards and forwards counter has gates which control the counting direction. Each counting stage is a clock controlled king-master-slave flip-flop. Each corresponding master stage is doubled, with the inputs connected in parallel. The additional master stages form the presetting register, and outputs of master stages are connected to a comparator which responds when two master stages belonging to the same counting stage have the same operational position in all counting stages.</p>
申请公布号 DE2530438(A1) 申请公布日期 1977.01.27
申请号 DE19752530438 申请日期 1975.07.08
申请人 SIEMENS AG 发明人 HOEHNE,WERNER,DIPL.-ING.
分类号 H03K21/02;H03K23/66;(IPC1-7):03K21/36 主分类号 H03K21/02
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