| 摘要 |
<p>A phase-locked loop circuit, which is used in order to extract a clock signal out of a received signal obtained from a token ring network or various LANs, has a phase comparator (1), a charge pump (3), and a voltage controlled oscillator (5). Said phase comparator (1) has a window signal generating means (13), and edge extracting means (11), and a control means (15). This edge extracting means (11) finds the edge existence in a received signal during the open period of said window signal. Therefore, if the center edge of the signal has a phase jitter within the open period, the extracting means (11) can find the center edge. When the extracting means (11) finds no edge, said control means (15) shifts the window position by a certain bit time, so as to restart the new extracting of center edge. Thus, this circuit can recover to the synchronous state without causing a bit slip even when a center edge is lost. <IMAGE></p> |
