发明名称 MANUFACTURE OF SEMICONDUCTOR SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To manufacture a wafer having high accuracy and whose flatness and parallelism are superior, even in a case where a surface grinding process is adopted as a manufacturing process. SOLUTION: In a first manufacturing method, the prescribed surface finishing operation of a wafer is performed via a slicing process, a chamfering process and a surface grinding process. Before the surface grinding process, a lapping and working operation which works the wafer to 1μm or higher per face is executed. In a second manufacturing method, the prescribed surface-finishing operation of a wafer is performed via a slicing process, a chamfering process and a surface-grinding proces. In the surface- grinding process, a surface grinding and working operation is executed to both faces at the same time. After the simultaneous surface grinding and working operation of both faces at 1μm or higher per face of the wafer in the surface-grinding process, the surface grinding and working operation is executed to one face each of the wafer. In a third manufacturing method, the prescribed surface-finished operation of a wafer is performed via a slicing process, a chamfering process and a surface-grinding process. In the surface-grinding process, a surface-grinding and working operation to each face of the wafer is executed, while the wafer is sucked under a low pressure.
申请公布号 JPH1131670(A) 申请公布日期 1999.02.02
申请号 JP19970185105 申请日期 1997.07.10
申请人 SUMITOMO METAL IND LTD 发明人 YAMADA YASUNARI
分类号 H01L21/304;(IPC1-7):H01L21/304 主分类号 H01L21/304
代理机构 代理人
主权项
地址