| 摘要 |
In described examples of techniques for integrating power field-effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for implementing multi-phase bridge circuits, the techniques may provide a multi-chip package (62) with at least two high-side (HS) FETs (80) and at least two low-side (LS) FETs (82, 84, 86), and place the at least two HS FETs or the at least LS FETs on a common die (80). Placing at least two FETs on a common die may reduce the number of die and the number of thermal pads (i.e., die pads) needed to implement a set of power FETs, thereby decreasing component count of a multi-phase bridge circuit and/or allowing a more compact, higher current density multi-phase bridge circuit to be obtained without significantly increasing thermal power dissipation of the circuit. |
