| 摘要 |
A frequency synthesizer capable of switching the output frequency thereof at high speed has a second phase/frequency comparator (32) and a second variable frequency divider (34) in addition to a first phase/frequency comparator (20) which is included in a PLL. The synthesizer switches over the time constant of a loop filter (24) by the output of the second phase/frequency comparator, i.e., independently of the PLL which is responsive to the output of the first phase/frequency comparator (20). As a result, the time constant of the loop filter is switched over at an advanced timing to thereby reduce the PLL tuning time. <IMAGE> |
