| 摘要 |
In a nonvolatile semiconductor memory device having a memory array of a NAND structure, threshold voltages of the word line voltage set at the time of reading are set to VWL00, VWL01, and VWL10, and one VWL10 among the threshold voltages is set to the negative voltage. By this, it becomes possible to set the threshold voltage distribution width of the memory transistor and the interval between one data and the next wider. As a result, writing control becomes easier and the disturbance/retention characteristics can be enhanced.
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