发明名称 SENSE AMPLIFIER CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To realize a latch type sense amplifier circuit with which current consumption is not increased also in a semiconductor memory other than DRAM. SOLUTION: A pair of bit lines S, S/ are set to the same potential by a pre-charge circuit 20 and set to a potential VPC at the time of reading out information. After that, a word line Wl is selectively activated, potentials of the bit lines S, S/ are complementarily raised or dropped based on the holding information of memory cells MCa, MCb. At the time, for example, when a potential of the bit line S/ becomes lower than the transhold value of a NMOS 12, is in a cut-off state, the bit line S is separated form an input/output terminal N1 of an amplifying section 11 until a potential of the bit line S is raised to a power source potential VH.</p>
申请公布号 JPH11232880(A) 申请公布日期 1999.08.27
申请号 JP19980032763 申请日期 1998.02.16
申请人 OKI ELECTRIC IND CO LTD 发明人 IGARASHI YASUSHI
分类号 G11C11/419;G11C16/06;(IPC1-7):G11C11/419 主分类号 G11C11/419
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