发明名称 SEMICONDUCTOR MODULE
摘要 <p>PROBLEM TO BE SOLVED: To prevent malfunction, by providing a clock speed of a predetermined value, and a semiconductor layer comprising a power source layer connected to the power source of a semiconductor memory, a ground layer connected to the ground, and a signal layer forming a signal wiring connected to a signal terminal. SOLUTION: A dual in-line semiconductor module has a semiconductor memory 3, which has a clock speed of 50 MHz or more and is mounted on a printed wiring board 2 comprising metal conductive layers and an insulating layer between them, and a connecting terminal electrically connected to the printed wiring board 2. The metal conductive layer comprises a signal layer 21, a power source layer 23 and a ground layer 22, and the metal conductive layers are insulated with an insulating layer 24. The terminal of the semiconductor memory 3 is connected to the connecting terminal through a signal wiring, the power source layer 23, and the ground layer 22 and to the signal or the power source of an external circuit via the connecting terminal. This can reduce noises and provide a high speed operation.</p>
申请公布号 JPH11251516(A) 申请公布日期 1999.09.17
申请号 JP19980051757 申请日期 1998.03.04
申请人 HITACHI LTD 发明人 SHIMIZU HIROYA;KITANO MAKOTO;NAKAMURA ATSUSHI;TOKIDA KENSUKE
分类号 H05K3/46;H01L23/12;H01L25/065;H01L25/07;H01L25/10;H01L25/11;H01L25/18;(IPC1-7):H01L25/10 主分类号 H05K3/46
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