发明名称 Reducing computing system power through idle synchronization
摘要 Systems and methods of power management provide for controlling the idleness of a processor based on an operating system schedule. The idleness of at least one device is synchronized with the idleness of the processor. Idleness synchronization may involve deferring bus transactions, suspending memory refresh, turning off power to clock sources and turning off power to combinatorial logic during an idle window in the OS schedule.
申请公布号 US2006288240(A1) 申请公布日期 2006.12.21
申请号 US20050153950 申请日期 2005.06.16
申请人 INTEL CORPORATION 发明人 KARDACH JAMES P.;WILLIAMS DAVID L.;MISHRA ANIMESH
分类号 G06F1/26 主分类号 G06F1/26
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