发明名称 Semiconductor integrated circuit device having reservoir capacitor and method of manufacturing the same
摘要 A semiconductor integrated circuit device having a reservoir capacitor and a method of manufacturing the same are provided. A first insulating layer is formed on a semiconductor substrate including a first region and a second region. A first conductive layer is formed on the first insulating layer, and a second insulating layer is formed on the first conductive layer. The second insulating layer is patterned to be left in a portion of the first region. A second conductive layer is formed on the second insulating layer and the first conductive layer. The second conductive layer is etched to expose a partial surface of the first conductive layer in the first region. The second conductive layer and the first conductive layer are etched to form a reservoir capacitor in the first region and form a gate in the second region.
申请公布号 US9385161(B2) 申请公布日期 2016.07.05
申请号 US201414477574 申请日期 2014.09.04
申请人 SK Hynix Inc. 发明人 Park Hae Chan
分类号 H01L27/24;H01L29/40;H01L49/02;H01L29/66;H01L27/08;H01L29/94 主分类号 H01L27/24
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A method of manufacturing a semiconductor integrated circuit device, the method comprising: forming a first insulating layer over a semiconductor substrate including a first region and a second region; forming a first conductive layer over the first insulating layer; forming a second insulating layer over the first conductive layer; patterning the second insulating layer to form a second insulating pattern in the first region and expose the first conductive layer in the second region; forming a second conductive layer over the second insulating pattern in the first region and over the first conductive layer in the second region; etching the second conductive layer and the second insulating pattern in the first region to expose a partial surface of the first conductive layer in the first region; and etching the second conductive layer and the first conductive layer in the first region and the second region to simultaneously form a reservoir capacitor in the first region and a gate in the second region, wherein the reservoir capacitor includes a first electrode and a second electrode, wherein the second electrode has a line width narrower than that of the first electrode, wherein the first electrode is formed of the first conductive layer and the second electrode is formed of the second conductive layer.
地址 Gyeonggi-do KR