| 摘要 |
A three resist-masking step process produces lower cost monolithic integrated circuit insulated gate field effect transistors with improved electrical characteristics. To fabricate a metal-nitride-oxide-silicon device, layers of grown oxide, silicon nitride, and field oxide are deposited on a wafer, and the first mask facilitates etching of source and drain openings. After depositing activator impurity and glass, and diffusing, the second mask is used in simultaneously etching contact holes and a gate opening using the silicon nitride as an etch stop. The third mask delineates the contact metallizations. |
