| 摘要 |
1443063 Pulse-pair decoding INTERNATIONAL STANDARD ELECTRIC CORP 24 April 1975 [24 April 1974] 17012/75 Heading G4H In a decoder for decoding a pair of input pulses with a characteristic spacing between the pulses, count recognition means are responsive to a series of counters which take on in turn the counting of clock pulses, the first of the series starting counting in response to each input pulse. A pair of pulses with a characteristic time separation is recognized by using each to set a control flip-flop associated with the first of a chain of identical binary counters to cause the counter to count clock pulses. When the first counter reaches capacity it resets its control flip-flop to stop counting the clock pulses and sets the control flip-flop of the next counter which then starts to count the clock pulses, and so on. Gates respond to stages of the first counter to set and reset a flip-flop to define a tolerance window. This flip-flop partially enables two output gates relating to respective time separations to be recognized, one of them also being partially enabled by gates responsive to stages of the second counter and the other also being partially enabled by the "capacity" (overflow) output of the fourth (last) counter. The resolution power of the decoder corresponds to the capacity of the first counter. The invention can be applied in TACAN or DME radio navigation systems. |
