| 摘要 |
A write clock pulse generator is disclosed, in which a horizontal synchronizing signal is separated from an input video signal and supplied to a PLL (phase locked loop) circuit to form a first clock with the frequency of nfH (n is an integer), a color burst signal is separated from the input video signal and used to drive a gate type variable oscillator to thereby form a second clock synchronized in phase with the color burst signal and whose average frequency is nfH, a difference between the pulse widths of the clocks resulting from counting down the first and second clocks to 1/M and the frequency of the variable oscillator is controlled by the compared output therebetween, whereby to produce a second clock synchronized in phase with the color burst signal and the frequency of which is n times the horizontal synchronizing signal. |
