Semiconductor memory device.

摘要

A semiconductor memory device includes a memory cell array which is formed of memory cells each connected to an intersection of a plurality of bit lines 32d and word lines 30. During designing the layout, a length L1 of a storage electrode 38 of an outermost memory cell in the memory cell array is longer than that L2 of a storage electrode 38 of an inner memory cell (Figure 3), or a spacing L4 between two bit lines (32e, 32f) in the periphery of the memory cell array is longer than that L3 between bit lines (32d, 32e) in the inner portion of the memory cell array (Figure 5), or a width L6 of an active region 36a of the outermost memory cell is wider than that L5 of an active region 36b of an inner memory cell, thereby forming a metal layer 46 having an excellent step coverage by means of only the layout arrangement without additional processes, while not being concerned about the structure of a storage electrode 38. <IMAGE>