发明名称 Transferring messages in a parallel processing system using reception buffers addressed by pool pages in a virtual space
摘要 In a parallel processor system, a plurality of nodes each comprising a processor and a main storage unit are interconnected through a network, wherein a user process is executed under the control of an operating system in each of the nodes and inter-process communications are performed through the network for transmitting and receiving messages among the nodes. Reception buffers are provided in a main storage unit and addressed by pool pages, which are discontinuous in a logical address domain or in a real address domain, in a virtual space used by the user process executed by each node. Additionally, reception buffer control information is located on the main storage unit for managing the reception buffers. A node, when receiving a message, uses communication information included in the received message and reception buffer control information to calculate a real address in the reception buffers for storing the received message.
申请公布号 US5867664(A) 申请公布日期 1999.02.02
申请号 US19960766897 申请日期 1996.12.13
申请人 HITACHI, LTD. 发明人 KOSUGI, HIDENORI;HAMILTON, PATRICK
分类号 G06F15/17;G06F13/00;G06F15/16;G06F15/177;(IPC1-7):G06F15/16 主分类号 G06F15/17
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