| 摘要 |
A circuit for digitally monitoring a duty cycle of a pulse width modulated signal is provided. The circuit includes a counter portion, a digital filter, and a data storage device. The counter portion is connectable to receive the pulse width modulated signal and is operable to monitor the pulse width modulated signal for a predetermined time period during which a count value is established. The digital filter is connected to receive the count value established by the counter portion and is also connected to receive a stored count value from the storage device, the digital filter being operable to establish a filtered count value based upon the count value and the stored count value input thereto. The storage device is connected to receive the filtered count value established by the digital filter. Multiple pwm signals may be also be monitored by including multiple counters, multiple storage devices, and one or more multiplexers.
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