| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique for improving the yield of a semiconductor integrated circuit device, having wiring structure that is formed by damascene method. SOLUTION: The defect of wiring, that is formed by damascene method, is extracted by the pattern defect comparison inspection and SEM inspection and is identified to be a defect, that is ascertained by a process trace in advance. According to the result, feedback is made to processes which cause troubles in, for example, maintaining of the device, replacing of a member, and optimizing of the wiring structure or a wiring process, thus improving the yield of the damascene process.
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