| 摘要 |
<p>PURPOSE:To obtain a three-dimensional bare chip IC having a structure, wherein a signal delay is made smallest, the mounting density of bare chips can be more enhanced in a optimum structure for a high-speed response element and a mounting operation is easy, by a method wherein the two bare chips are bonded together in opposition to each other using conductor bumps and moreover, the rear of the chip on one side of the chips is die-bonded on a substrate and the like. CONSTITUTION:Chip electrode pads 13 and 14 are respectively formed on the surfaces of two semiconductor bare chips in such a way that the pads 13 and 14 are arranged in such an arrangement that when the chip 2 is turned over, the pads 14 and 13 coincide with each other and the fellow chip electrode pads 13 and 1 4 are bonded together using conductor bumps 4. The rear of the chip 1 on one side of the chips 1 and 2 is die-bonded on carriers, such as a substrate 7, a lead frame and a package, and electrode pads 10 on the chip 1 with the rear bonded on the carriers and pads 6 on the electrode 7 are bonded together by wire bonding. For example, bumps 4 are respectively formed on pads 13 on a first chip 1, a second chip 2 is put on the first chip 1 by turning the chip 2 over to make the fellow pads 13 and pads 14, oppose to each other and the two chips are bonded together by thermol compression bonding.</p> |
