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发明名称
积体电路结构及其形成方法
摘要
本发明提供一种包括熔丝之积体电路结构及其制造方法。积体电路结构包含基板、置于该基板上方之内连线结构、与该内连线结构连接之熔丝、以及位于该熔丝上之抗反射涂层。该抗反射涂层具有一增厚之厚度且作为残余氧化物,且在该抗反射涂层上不存在多余的残余保护层。
申请公布号
TW200737413
申请公布日期
2007.10.01
申请号
TW095144965
申请日期
2006.12.04
申请人
台湾积体电路制造股份有限公司
发明人
蔡豪益;侯上勇;吴念芳;蔡佳伦;郑心圃
分类号
H01L21/82(2006.01);H01L23/52(2006.01)
主分类号
H01L21/82(2006.01)
代理机构
代理人
洪澄文;颜锦顺
主权项
地址
新竹市新竹科学工业园区力行六路8号
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